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Eeschema v4.0 Documentation
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Chapter 8. Design verification with Electrical Rules Check

 来源:kicad 浏览 420 扫码 分享 2021-01-03 10:45:12
  • Chapter 8. Design verification with Electrical Rules Check

    Chapter 8. Design verification with Electrical Rules Check

    Chapter 8. Design verification with Electrical Rules Check

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    • Cover
    • Chapter 1. Introduction to Eeschema
      • 1.1. Description
      • 1.2. Technical overview
    • Chapter 2. Generic Eeschema commands
      • 2.1. Access to Eeschema commands
      • 2.2. Mouse commands
      • 2.3. Hotkeys
      • 2.4. Selecting grid size
      • 2.5. Zoom selection
      • 2.6. Displaying cursor coordinates
      • 2.7. Top menu bar
      • 2.8. Upper toolbar
      • 2.9. Right toolbar icons
      • 2.10. Left toolbar icons
      • 2.11. Pop-up menus and quick editing
    • Chapter 3. Main top menu
      • 3.1. File menu
      • 3.2. Preferences menu
      • 3.3. Help menu
    • Chapter 4. General Top Toolbar
      • 4.1. Sheet management
      • 4.2. Options of the schematic editor
      • 4.3. Search tool
      • 4.4. Netlist tool
      • 4.5. Annotation tool
      • 4.6. Electrical Rules Check tool
      • 4.7. Bill of Material tool
      • 4.8. Import tool for footprint assignment:
    • Chapter 5. Schematic Creation and Editing
      • 5.1. Introduction
      • 5.2. General considerations
      • 5.3. The development chain
      • 5.4. Component placement and editing
      • 5.5. Wires, Buses, Labels, Power ports
      • 5.6. Drawing Complements
      • 5.7. Rescuing cached components
    • Chapter 6. Hierarchical schematics
      • 6.1. Introduction
      • 6.2. Navigation in the Hierarchy
      • 6.3. Local, hierarchical and global labels
      • 6.4. Hierarchy creation of headlines
      • 6.5. Sheet symbol
      • 6.6. Connections - hierarchical pins
      • 6.7. Connections - hierarchical labels
      • 6.8. Complex Hierarchy
      • 6.9. Flat hierarchy
    • Chapter 7. Automatic classification Annotation
      • 7.1. Introduction
      • 7.2. Some examples
    • Chapter 8. Design verification with Electrical Rules Check
      • 8.1. Introduction
      • 8.2. How to use ERC
      • 8.3. Example of ERC
      • 8.4. Displaying diagnostics
      • 8.5. Power pins and Power flags
      • 8.6. Configuration
      • 8.7. ERC report file
    • Chapter 9. Create a Netlist
      • 9.1. Overview
      • 9.2. Netlist formats
      • 9.3. Netlist examples
      • 9.4. Notes on Netlists
      • 9.5. Other formats
    • Chapter 10. Plot and Print
      • 10.1. Introduction
      • 10.2. Common printing commands
      • 10.3. Plot in Postscript
      • 10.4. Plot in PDF
      • 10.5. Plot in SVG
      • 10.6. Plot in DXF
      • 10.7. Plot in HPGL
      • 10.8. Print on paper
    • Chapter 11. Component Library Editor
      • 11.1. General Information About Component Libraries
      • 11.2. Component Library Overview
      • 11.3. Component Library Editor Overview
      • 11.4. Library Selection and Maintenance
      • 11.5. Creating Library Components
      • 11.6. Graphical Elements
      • 11.7. Multiple Units per Component and Alternate Body Styles
      • 11.8. Pin Creation and Editing
      • 11.9. Component Fields
      • 11.10. Power Symbols
    • Chapter 12. LibEdit - Complements
      • 12.1. Overview
      • 12.2. Position a component anchor
      • 12.3. Component aliases
      • 12.4. Component fields
      • 12.5. Component documentation
      • 12.6. Symbol library
    • Chapter 13. Viewlib
      • 13.1. Introduction
      • 13.2. Viewlib - main screen
      • 13.3. Viewlib top toolbar
    • Chapter 14. Creating Customized Netlists and BOM Files
      • 14.1. Intermediate Netlist File
      • 14.2. Conversion to a new netlist format
      • 14.3. XSLT approach
      • 14.4. Command line format: example for python scripts
      • 14.5. Intermediate Netlist structure
      • 14.6. More about xsltproc
    • Copyright
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