5.5. Wires, Buses, Labels, Power ports

5.5. Wires, Buses, Labels, Power ports

5.5.1. Introduction

All these drawing elements can also be placed with the tools on the vertical right toolbar.

These elements are:

• Wires: most connections between components.
• Buses: to graphically join bus labels
• Polylines: for graphic presentation.
• Junctions: to create connections between crossing wires or buses.
• Bus entries: to show connections between wires and buses. Graphical only!
• Labels: for labeling or creating connections.
• Global labels: for connections between sheets.
• Texts: for comments and annotations.
• “No Connect” flags: to terminate a pin that does not need any connection.
• Hierarchical sheets, and their connection pins.

5.5.2. Connections (Wires and Labels)

There are two ways to establish connection:

• Pin to pin wires.
• Labels.

The following figure shows the two methods:

Note 1:

The point of “contact” of a label is the lower left corner of the first letter of the label. This point is displayed with a small square when not connected.

This point must thus be in contact with the wire, or be superimposed at the end of a pin so that the label is seen as connected.

Note 2:

To establish a connection, a segment of wire must be connected by its ends to an another segment or to a pin.

If there is overlapping (if a wire passes over a pin, but without being connected to the pin end) there is no connection.

Note 3:

Wires that cross are not implicitly connected. It is necessary to join them with a junction dot if a connection is desired.

The previous figure (wires connected to DB25FEMALE pins 22, 21, 20, 19) shows such a case of connection using a junction symbol.

Note 4:

If two different labels are placed on the same wire, they are connected together and become equivalent: all the other elements connected to one or the other labels are then connected to all of them.

5.5.3. Connections (Buses)

In the following schematic, many pins are connected to buses.

Bus members

From the schematic point of view, a bus is a collection of signals, starting with a common prefix, and ending with a number. For example, PCA0, PCA1, and PCA2 are members of the PCA bus.

The complete bus is named PCA[N..m], where N and m are the first and the last wire number of this bus. Thus if PCA has 20 members from 0 to 19, the complete bus is noted PCA[0..19]. A collection of signals like PCA0, PCA1, PCA2, WRITE, READ cannot be contained in a bus.

Connections between bus members

Pins connected between the same members of a bus must be connected by labels. It is not possible to connect a pin directly to a bus; this type of connection will be ignored by Eeschema.

In the example above, connections are made by the labels placed on wires connected to the pins. Bus entries (wire segments at 45 degrees) to buses are graphical only, and are not necessary to form logical connections.

In fact, using the repetition command (Insert key), connections can be very quickly made in the following way, if component pins are aligned in increasing order (a common case in practice on components such as memories, microprocessors…):

• Place the first label (for example PCA0)
• Use the repetition command as much as needed to place members. Eeschema will automatically create the next labels (PCA1, PCA2…) vertically aligned, theoretically on the position of the other pins.
• Draw the wire under the first label. Then use the repetition command to place the other wires under the labels.
• If needed, place the bus entries by the same way (Place the first entry, then use the repetition command).

Note

In the Preferences/Options menu, you can set the repetition parameters:

• Vertical step.
• Horizontal step.
• Label increment (which can thus be incremented by 2, 3. or decremented).

Global connections between buses

You may need connections between buses, in order to link two buses having different names, or in the case of a hierarchy, to create connections between different sheets. You can make these connections in the following way.

Buses PCA [0..15], ADR [0..7] and BUS [5..10] are connected together (note the junction here because the vertical bus wire joins the middle of the horizontal bus segment).

More precisely, the corresponding members are connected together : PCA0, ADR0 are connected, (as same as PCA1 and ADR1 … PCA7 and ADR7).

Furthermore, PCA5, BUS5 and ADR5 are connected (just as PCA6, BUS6 and ADR6 like PCA7, BUS7 and ADR7).

PCA8 and BUS8 are also connected (just as PCA9 and BUS9, PCA10 and BUS10)

5.5.4. Power ports connection

When the power pins of the components are visible, they must be connected, as for any other signal.

Components such as gates and flip-flops may have invisible power pins. Care must be taken with these because:

• You cannot connect wires, because of their invisibility.
• You do not know their names.

And moreover, it would be a bad idea to make them visible and to connect them like the other pins, because the schematic would become unreadable and not in accordance with usual conventions.

Note

If you want to enforce the display of these invisible power pins, you must check the option “Show invisible power pins” in the Preferences/Options dialog box of the main menu, or the icon on the left (options) toolbar.

Eeschema automatically connects invisible power pins of the same name to the power net of that name. It may be necessary to join power nets of different names (for example, “GND” in TTL components and “VSS” in MOS components); use power ports for this.

It is not recommended to use labels for power connection. These only have a “local” connection scope, and would not connect the invisible power pins.

The figure below shows an example of power port connections.

In this example, ground (GND) is connected to power port VSS, and power port VCC is connected to VDD.

Two PWR_FLAG symbols are visible. They indicate that the two power ports VCC and GND are really connected to a power source. Without these two flags, the ERC tool would diagnose: Warning: power port not powered.

All these symbols are components of the schematic library “power”.

5.5.5. “No Connect” flag

These symbols are very useful to avoid undesired ERC warnings. The electric rules check ensures that no connection has been accidentally left unconnected.

If pins must really remain unconnected, it is necessary to place a “No Connect” flag (tool ) on these pins. These symbols do not have any influence on the generated netlists.