aarch64-paging

The aarch64-paging crate lets you create page tables according to the AArch64 Virtual Memory System Architecture.

  1. use aarch64_paging::{
  2.     idmap::IdMap,
  3.     paging::{Attributes, MemoryRegion},
  4. };
  6. const ASID: usize = 1;
  7. const ROOT_LEVEL: usize = 1;
  9. // Create a new page table with identity mapping.
  10. let mut idmap = IdMap::new(ASID, ROOT_LEVEL);
  11. // Map a 2 MiB region of memory as read-only.
  12. idmap.map_range(
  13.     &MemoryRegion::new(0x80200000, 0x80400000),
  14.     Attributes::NORMAL | Attributes::NON_GLOBAL | Attributes::READ_ONLY,
  15. ).unwrap();
  16. // Set `TTBR0_EL1` to activate the page table.
  17. idmap.activate();
  • For now it only supports EL1, but support for other exception levels should be straightforward to add.
  • This is used in Android for the Protected VM Firmware.
  • There’s no easy way to run this example, as it needs to run on real hardware or under QEMU.