3.2.7. Placement Layer

The Top Placement layer is intended to be printed on silkscreen and thus should contain information required for assembling the PCB. But don’t put too many things on that layer as it would waste space on the PCB!

Typically this layer should only contain some lines and dots to indicate where and in which orientation the device gets assembled, for example an outline and a dot next to pin 1.

The placement should be drawn according to IPC-7351C. The most important rules are the following:

• It should stay visible after assembling the package to allow reviewing positioning and orientation of assembled devices. In other words, the placement layer should primarily contain drawings around the package’s body, but not under it.

• Line width: 0.2mm typical, 0.1mm minimum

• Clearance to copper layers: Equal or greater than the line width, but at least 0.15mm

Example 6. Placement layer examples (only placement and copper layers shown)